The invention relates generally to electronic decoding systems and, more particularly, to an adaptive quadrature amplitude modulation (QAM) decoding system.
The need for high speed methods to efficiently and reliably transmit and receive data has long been known. In particular, there is a known need to develop multi-gigabit per second satellite links with bandwidth efficiencies of three bits per second per Hertz or greater at acceptable bit error rates. Quadrature amplitude modulation (xe2x80x9cQAMxe2x80x9d) is the most likely modulation technique to be able to reliably deliver data at such a high rate of transmission. Potential applications of a simple QAM decoding circuit, at high (or lower) transmission rates, include, for example, higher throughput UHF dissemination links and terrestrial broadcasting of digital (e.g., compressed) television signals or high definition television signals.
QAM is well known in the art. In general, bits are used to create individual xe2x80x9csymbolsxe2x80x9d which fall into different sections of a xe2x80x9cconstellation.xe2x80x9d The minimum precision or bit width used when converting a signal from analog to digital is determined by the modulation size, i.e. the number of bits/symbol. For example, 16 QAM (4 bits/symbol) has four voltage levels on each axis (the I and Q axes) and requires a two bit (or four level) analog-to-digital converter to decode each of the I and Q components. In 16 QAM, the 2-bit outputs of the A/D converters are analyzed to determine the location of a symbol in the constellation. Thus, in 16 QAM, the most significant bit from the analog-to-digital (A/D) converter indicates if the position of the symbol in question is greater than zero or less than zero. A value of one indicates that the symbol is greater than zero while a value of zero indicates that the symbol is less than zero. The second significant bit indicates whether the symbol is above or below the mid-point between the upper and lower thresholds. If the second significant bit is above the mid-point between the upper and lower thresholds, the second significant bit value will be one, while a value of zero indicates that the symbol is less than the mid-point between the upper and lower thresholds.
A sample 16 QAM constellation is illustrated in FIG. 5 which shows that the available digital space (both imaginary and real space) is divided into 16 areas (separated by bold lines). As is known, a symbol is decoded into bits based on the areas into which the I and Q components fall.
Unfortunately, there have been significant problems which have hindered the development of QAM at very high transmission rates, including problems caused by voltage bias errors, gain errors and channel distortions. In particular, voltage bias errors and gain errors plague high speed QAM circuits. Past methods of controlling voltage bias and gain error required great care in the design of compensation circuits and, particularly, in the temperature compensation of these circuits. Furthermore, past methods of decision-making used to compensate for voltage bias errors and gain errors often used sub-sampled (high resolution) analog-to-digital converters or multiple comparators, both of which are relatively inefficient. Still further, past voltage bias and gain compensation circuits were not integrated with the equalizer circuits, resulting in unnecessarily complex compensation circuits which were difficult to build.
Equalization is typically necessary to compensate for channel distortions introduced by band limiting atmospheric distortions and general non-ideal filtering, which causes intersymbol interference. A transversal (e.g., tapped delay line or nonrecursive) equalizer is a common device used for equalization in high transmission rate systems. A transversal equalizer can be described as a tapped delay line where each tap output is passed through an adjustable gain and phase shift and is then summed with the other tap outputs. The gain and phase shift of each tap output is determined by, for example, a zero forcing algorithm. In such a system, the current and past values of a received signal are linearly weighted by equalizer coefficients (tap gains) and are summed to produce the output. In a zero forcing equalizer (xe2x80x9cZEFxe2x80x9d), the equalizer coefficients are chosen to force samples of a combined channel and equalizer impulse response to zero at all but one (i.e., the main path) of a set of spaced instants in the equalizer.
FIG. 1 illustrates a known prior art QAM decoding system. In this system, a transmitter 1 converts a digital signal to symbols, modulates the symbols onto a carrier signal and transmits the modulated carrier signal through a channel 2 to a receiver/tapped delay line equalizer 3. The tapped delay line equalizer 3 uses tap weights received from a ZFE 4 to equalize the signal. The equalized signal is then communicated to a demodulator 5 which converts the signal to baseband and communicates the baseband signal to an analog-to-digital (A/D) converter 6. The output of the A/D converter 6 is then communicated to a decision unit 7 which decodes the symbols received using, for example, the constellation of FIG. 5. In addition, the baseband signal from the demodulator 5 is communicated to a high resolution A/D converter 8 which produces a high resolution error signal. The output of the high resolution A/D converter 8 is communicated as error information to the ZFE 4 which, in turn, uses the high resolution error signal to calculate tap weight adjustments which are then communicated to the tapped delay line equalizer 3. The tapped delay line equalizer 3 uses the tap weight adjustments to equalize the circuit in a known manner.
While intersymbol interference caused by linear distortions can be corrected through equalization, current methods of equalization are relatively slow, inefficient and consume a lot of power. Further, known methods of equalization are not integrated with gain error and voltage bias compensation methods and, as a result, these known equalization methods typically fail to take into account errors beyond the chosen feedback point. In particular, in the system of FIG. 1, the decision circuit 7 makes symbol decoding decisions based on the output of the A/D converter 6 while the ZFE 4 makes equalizer decisions based on the output of the A/D converter 8, which are different A/D converters. As a result, the transfer function of the A/D converter 6 is not taken into account in the ZFE 4 and, likewise, the transfer function of the A/D converter 8 is not taken into account by the decision circuit 7, leading to a mismatch between the symbol decoding and equalizer functions. This, in turn, can lead to errors in symbol decoding.
An adaptive quadrature amplitude modulation (xe2x80x9cQAMxe2x80x9d) decoding system for use in, for example, high speed, bandwidth efficient QAM communication systems includes a circuit that adaptively adjusts gain and voltage bias and provides adaptive equalization feedback based on the same signal used to decode the QAM symbols. In one embodiment, the QAM decoding system minimizes gain errors, voltage bias errors and provides adaptive equalization feedback parameters for use in an equalizer such as in a zero forcing equalizer (xe2x80x9cZFExe2x80x9d).
To minimize gain error, the system analyzes a specific significant bit in a sequence of output bits provided by an analog-to-digital converter used to perform decoding function, calculates a new long term average of the specific significant bit (including the most recent significant bit output by the analog-to-digital converter), and determines if the new long term average of the specific significant bit is greater than a desired value, which, for example, may be the mean between the possible values. The system adjusts the gain down if the long term average of specific significant bits is greater than the desired value (or range of values), adjusts the gain up if the long term average of specific the significant bit is less than the desired value (or range) and repeats these steps to adaptively minimize gain errors.
To correctly set voltage bias, the system executes a comparison function on two specific bits produced by the analog-to-digital (A/D) converter used to perform symbol decoding functions, calculates a new long term average of comparison function results (including the most recent result of the comparison function), and determines if the long term average of comparison function results is greater than a specific value or range of values. This method increases the voltage bias if the long term average of the comparison function results is less than the specific value (or range), and decreases the bias if the comparison function result is greater than the specific value (or range). The method then repeats these steps to adaptively set the voltage bias.
To adaptively equalize, the system extracts information from the analog-to-digital converter used to make symbol decoding decisions and uses this information to determine the correlation between errors within the main transmission path within the equalizer and the signal associated with a number of time delayed paths within the equalizer. The correlation values are then used as offsets to tap weights within the equalizer.